Job Title
Senior Analog/Mixed-Signal IC Design Engineer - Acacia
Role Summary
Design and productize high-speed analog and mixed-signal CMOS ICs for optical transceivers used in data center and telecom networks. The role is on the Acacia mixed-signal IC design team and requires close collaboration with digital/DSP, system, package and module teams to meet signal and power integrity and manufacturability requirements.
This is a hybrid role requiring three days per week in the San Jose, CA office.
Experience Level
Senior. Minimum experience varies by degree (see Education Requirements), with expectations for technical leadership, block-level ownership, mentoring, and productionization experience.
Responsibilities
Lead architecture, design, verification, layout and bring-up of high-speed AMS blocks and shepherd designs from concept to production.
- Architect and implement ultra-deep sub-micron CMOS analog/mixed-signal blocks for optical transceivers.
- Lead a large block on complex SoCs: set technical direction, track deliverables, and review peer designs.
- Perform circuit simulation, layout review, and lab characterization; iterate designs based on measurements.
- Collaborate with packaging, hardware and system teams to meet signal and power integrity and manufacturability targets.
- Mentor junior engineers and establish design methodology and best practices.
Requirements
Must-have technical skills and experience; preferred items are listed when available.
- Proven experience designing, simulating and measuring high-speed ICs across multiple functional areas such as serializers/deserializers, data converters, voltage regulators, output drivers, PLLs, clock distribution, op amps, programmable-gain amplifiers, and equalizers.
- Hands-on experience with high-speed AMS circuit design and mixed-signal simulation flow.
- Block-level ownership on complex chips, including floorplanning and power/ground partitioning.
- Experience with layout practices for high-frequency circuits and custom transistor layout.
- Strong problem-solving skills for signal and power integrity in package and module contexts.
- Ability to lead peer reviews, define verification plans, and guide designs through production qualification.
- Nice-to-have: experience with electrical transceiver applications (backplane/cable), FinFET technology, passive component design (inductors, transformers, transmission lines), design-for-manufacturability, and ESD lab methodology.
- Nice-to-have tools: Cadence Virtuoso, Spectre/APS/SpectreX, MATLAB, EMX; experience with AMS simulation environments.
Education Requirements
Minimums specified: BSEE with 12+ years of relevant experience, or MS with 8+ years, or PhD with 5+ years, or equivalent practical experience.
About the Company
Company: Cisco Systems
Headquarters: San Jose, CA, United States
Cisco Systems is a global technology company that designs and sells networking hardware, telecommunications equipment, software, and services. It provides enterprise and service-provider networking, security, collaboration, and optical communications solutions (including Acacia Communications technologies for high-speed optical interconnects).

Date Posted: 2026-08-17