Senior Analog Layout Manager

Job Title

Senior Analog Layout Manager

Role Summary

Lead and grow a team of analog layout designers within Marvell Central Engineering's AMS-IP organization. The role combines people management, project planning, and hands-on macro-level layout work to deliver advanced SerDes and analog mixed-signal IPs for SoC products.

Based in San Diego, this position is responsible for schedule and risk assessment, cross-functional coordination with CAD, technology, and circuit design teams, and driving layout execution from chip planning through tape-out.

Experience Level

Senior-level. Minimum of 10+ years in analog layout design and at least 3+ years of management experience (as specified by the employer).

Responsibilities

Primary responsibilities include technical leadership, schedule and risk management, and hands-on layout contributions at the macro level.

• Hire, lead, mentor, and grow a team of analog layout designers.
• Assess schedules, floor plans, and risks for digital macros and analog blocks.
• Perform hands-on macro-level layout when required.
• Manage and track layout schedules; recruit additional designers as needed to meet deadlines.
• Identify, prioritize, and mitigate project tasks and layout risks.
• Coordinate with CAD, process/technology, and circuit design teams to align layout schedules with project plans.
• Debug LVS/DRC/ERC reports and resolve layout issues; communicate technical issues across functions.

Requirements

Must-have technical and leadership qualifications followed by desirable skills.

• Must-have: 10+ years of analog layout design experience and 3+ years of management experience.
• Must-have: Deep understanding of layout methodology from chip planning through tape-out.
• Must-have: High proficiency in LVS and DRC debugging and interpreting Calibre reports (DRC, ERC, LVS).
• Must-have: Proficiency with Synopsys or Cadence layout entry tools.
• Must-have: Strong technical and analytical skills, problem-solving ability, and effective verbal and written communication.
• Nice-to-have: Experience with advanced process technologies and FinFET nodes.
• Nice-to-have: Scripting/programming skills (Skill, Ample, Perl) and experience in conflict resolution and consensus building.
• Nice-to-have: Proven ability to build and develop high-performing analog layout teams.

Education Requirements

Not specified.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.