Senior Analog Design Engineer

Role Summary

The Senior Analog Design Engineer will be responsible for designing advanced analog IPs, including high-speed I/Os, PLLs, and Bandgaps. The engineer will collaborate with layout engineers, lead global design reviews, and mentor junior engineers while striving to solve complex design challenges.

Experience Level

This position requires a minimum of 8 years of experience in analog/mixed-signal circuit design, including atleast 3 years in leadership roles or project management in high-speed PHY design.

Responsibilities

• Design analog IPs for advanced protocols such as UCIe, DDR, and SerDes PHY.
• Work with layout engineers to perform post-layout verifications.
• Troubleshoot noise, margin, and signal/power integrity issues.
• Conduct design and data quality checks.
• Lead and participate in global design reviews.
• Mentor and guide junior engineers, and support new product initiatives.

Requirements

The ideal candidate should possess a BS, MS, or PhD in Electronics Engineering or a related field. A minimum of 2 years of experience in high-speed mixed-signal PHY design and strong expertise in analog/mixed-signal design and verification is required. Excellent English communication skills are necessary, and research experience is considered a plus.

Education Requirements

A degree in Electronics Engineering or a related field (BS, MS, or PhD) is required for this position.