Semiconductor Packaging Design Engineer

Job Title

Semiconductor Packaging Design Engineer

Role Summary

Design advanced semiconductor packages (ceramic and organic substrates) including flip‑chip and wire‑bond assemblies. Perform layout, parasitic extraction, SI/PI and thermal/mechanical analysis and produce fabrication artwork while collaborating with IC, system, and thermal engineering teams. Role is based in Orlando, FL; relocation assistance is available for qualified candidates.

Experience Level

Mid‑career — typically requires around 5+ years of relevant semiconductor packaging design, modeling, and simulation experience.

Responsibilities

Main responsibilities include:

• Develop package layouts from schematics/netlists using standard CAD tools (primary tool: Cadence Allegro APD+).
• Perform parasitic extraction and package‑level SI/PI analysis and optimization.
• Design package lids using SolidWorks and prepare mechanical/thermal models.
• Run electrical simulations (e.g., Cadence Celsius PowerDC, Sigrity) and mechanical/thermal analysis (e.g., Ansys).
• Work with SoC/IC/system teams to optimize die floorplans, bump patterns, and substrate/interposer stackups.
• Generate fabrication artwork and documentation for substrates and interposers.

Requirements

Must-have and preferred skills:

• Must-have: 5+ years of semiconductor packaging design, modeling, and simulation experience.
• Must-have: Strong experience with Cadence Allegro Package Designer Plus (APD+).
• Must-have: Experience with interposer and substrate layout and advanced package technologies (2.5D, 3D).
• Must-have: Practical experience with package-level SI/PI tool flows (extraction and analysis).
• Must-have: Experience designing package lids in SolidWorks and coordinating mechanical/thermal requirements.
• Must-have: Effective written/verbal communication, cross‑functional collaboration, and problem‑solving skills.
• Nice-to-have: Familiarity with Celsius PowerDC, Sigrity Advanced SI/PI modules, and RF/EM tools (AWR, Momentum, HFSS).
• Nice-to-have: Ability to perform schematic capture from PDFs/sketches; experience with Ansys for structural/thermal analysis.

Education Requirements

Bachelor's degree in Electrical Engineering, Mechanical Engineering, or a semiconductor‑packaging related discipline.

About the Company

Company: Elite Connector

Recruiting firm that partners with engineering and technology companies to source candidates for technical roles, including semiconductor and electronics packaging positions.