Role Summary
The RTL Design Lead will play a crucial role in the Computing and Graphics Group, focusing on cutting-edge designs. This position involves collaborating with various teams including architecture, IP design, and physical design to ensure successful silicon deliveries.
Experience Level
This position requires 8-12 years of full-time experience in IP hardware design, showcasing a deep understanding of RTL development for IP or subsystems.
Responsibilities
The main responsibilities include:
- Design of IP and subsystems with integration from AMD and third-party IPs.
- Performing quality checks on digital designs, ensuring compliance to lint, CDC, and power rule specifications.
- Collaborating with the IP team for design verification, implementation, and SOC delivery.
- Providing support to SOC teams for connectivity, DFT, verification, and physical design.
Requirements
We expect candidates to have:
- Proficiency in Verilog/System Verilog RTL design for high-speed digital circuits.
- Experience with Verilog lint (Spyglass) and simulation tools (VCS), along with CDC tools.
- A comprehensive understanding of SoC design flows and power management techniques.
- Strong communication skills to interact effectively with global teams.
- Excellent problem-solving abilities.
Education Requirements
A Bachelor’s degree in Computer Engineering or Electrical Engineering with 12 years of experience in IP hardware design, or a Master’s degree with 8 years of similar experience is required.