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RTL Design Engineer

eInfochips
May 19, 2026
Full-time
On-site
Mountain View, California, United States
RTL Design Jobs, Level - Mid-Career

Job Title

RTL Design Engineer

Role Summary

Design and implement RTL for ASIC/SoC projects using Verilog/SystemVerilog. The role focuses on front-end design, IP integration, interface protocol implementation, and preparation for back-end handoff.

Work as part of an engineering team supporting Arrow clients; the position requires being onsite at the client location in Mountain View and may require travel to other client offices as requested.

Experience Level

Mid-level β€” at least 5 years of RTL/Verilog design experience.

Responsibilities

Key responsibilities include:

  • Develop and maintain RTL using Verilog/SystemVerilog for ASIC/SoC blocks.
  • Implement and integrate industry-standard interfaces (AXI, APB) and high-speed interfaces such as PCIe.
  • Use front-end EDA tools for simulation, linting, CDC checking, and low-power checks.
  • Apply clock-domain crossing techniques and perform static timing analysis to support timing closure.
  • Create and maintain scripts (Python, Tcl, Perl) to automate design and verification flows.
  • Collaborate with customers and internal teams; provide regular status reporting and support design reviews.
  • Work onsite at the client location as required by project leadership.

Requirements

Must-have skills and experience:

  • 5+ years of experience in Verilog/SystemVerilog RTL design.
  • Proficiency with Verilog/SystemVerilog coding constructs and digital design fundamentals.
  • Experience with AMBA AXI/APB and familiarity with PCIe protocol implementations.
  • Hands-on experience with EDA tools such as VCS/Questa, Spyglass (lint), CDC checkers, and synthesis/place-and-route tool flows.
  • Familiarity with UPF for low-power intent and understanding of timing signoff fundamentals.
  • Strong skills in clock crossing techniques and CDC methodologies.
  • Scripting ability in Python, Tcl, or Perl for automation tasks.
  • Effective customer communication and progress reporting.

Nice-to-have:

  • Experience with ARM fabric IPs and IP-XACT.
  • Experience with Fusion Compiler, Design Compiler, Genus or similar flows.
  • Prior work on high-speed PCIe designs.

Education Requirements

Not specified.


About the Company

Company: eInfochips

Headquarters: Bengaluru, India

eInfochips is a product engineering and semiconductor design services company offering embedded software, SoC design and verification, testing, and IoT solutions. It operates as part of Arrow Electronics, serving clients across industries worldwide.

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Date Posted: 2026-05-18