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RTL Design Engineer

Macpower Digital Assets Edge
June 23, 2026
Full-time
On-site
Dallas, Texas, United States
RTL Design Jobs, Level - Senior

Job Title

RTL Design Engineer

Role Summary

Design and deliver RTL IP and subsystem-level logic for SoC projects. Work with specifications to create micro-architectures, implement RTL, and support verification and physical design teams through integration and tapeout readiness.

Experience Level

Senior β€” requires extensive experience; the posting specifies a minimum of 10 years of digital RTL design experience.

Responsibilities

Primary duties include implementation, integration, and verification support for RTL designs:

  • Create micro-architectural designs from specifications and develop hardware architecture.
  • Write and maintain RTL for IP development and top-level integration (clocks, resets, config registers).
  • Perform static checks and quality control: lint, CDC, synthesis checks, LEC and STA; debug functional failures.
  • Ensure synthesizability, timing quality, and low-power implementation (UPF/CPF) of designs.
  • Support verification teams with debug and collaborate with physical design teams on timing constraints.
  • Assist SoC designers during integration and take ownership to drive tasks to closure.

Requirements

Must-have technical skills and experience; nice-to-have items listed separately.

  • Must-have: 10+ years of RTL-level digital design using Verilog/SystemVerilog.
  • Experience developing micro-architecture from requirements and creating designs from scratch.
  • Experience with linting, CDC analysis, synthesis, timing closure, and low-power flow implementation.
  • Familiarity with Verilog/SystemVerilog and VHDL and supporting verification and physical design teams.
  • Ability to perform static checks (Spyglass or equivalent), LEC, and STA and to debug/fix functional issues.
  • Strong communication and collaboration skills; ownership of tasks through completion.
  • Nice-to-have: DMA, memory controller, MIPI DSI/CSI, data/control path pipeline design, interconnect/AMBA experience; JESD204C block experience; design automation/scripting (Python); licensed IP & PHY integration experience; DFT familiarity.

Education Requirements

Not specified.


About the Company

Company: Macpower Digital Assets Edge

Macpower Digital Assets Edge logo

Date Posted: 2026-06-18