RTL Design Engineer
Design and verify RTL for video codec hardware IP and related SoC/FPGA blocks. Work on architecture (macro and micro), develop RTL modules, testbenches, and scripts, perform functional verification, debugging and performance optimization.
Position is part of the hardware/ASIC IP development team focused on video codec implementations and implementation trade-offs for performance, power, bandwidth and area.
Mid-level. Years of experience not specified.
Primary responsibilities include architecture, RTL development, verification and optimization for video codec IP.
Must-have technical skills and experience for the role.
Posting references a bachelors degree (starting annual salary stated for candidates with a bachelors degree). No explicit minimum degree, specific field of study, certifications, or equivalent-experience language is provided.
Company: Chips &Media
Headquarters: Seoul, South Korea
South Korea–based semiconductor company specializing in video codec IP and related hardware IP development, including RTL design, verification, FPGA development, and customer support for multimedia semiconductor solutions.
