RTL Design and Verification Engineer

Job Title

RTL Design and Verification Engineer

Role Summary

Engineer responsible for RTL coding, verification (simulation and synthesis), and maintenance of hardware IP features. Works on verification environment setup, debugging, and providing customer support for delivered products.

Experience Level

Mid-level — 5 to 12 years of relevant industry experience.

Responsibilities

Primary responsibilities include design, verification, and customer-facing support for hardware IP.

• Design RTL code and implement value-added functions for hardware IP.
• Develop and run verification (simulation and synthesis) flows; set up verification environments.
• Debug hardware IP during development and resolve integration issues.
• Provide technical support to customers for released products.

Requirements

Must-have technical skills and experience, plus desirable skills.

• Must-have: Strong practical experience in RTL design and verification, including simulation and synthesis.
• Must-have: Proficiency with Verilog and C.
• Must-have: 5–12 years of relevant industry experience (RTL/verification/FPGA or semiconductor IP).
• Nice-to-have: Scripting skills (Python, Perl, Java, Shell).
• Nice-to-have: Knowledge of video codecs and FPGA development environments.
• Nice-to-have: Proficiency in English for communication with international teams/customers.

Education Requirements

Bachelor's or Master's degree in Electronics/Electrical Engineering, Semiconductor Engineering, or a closely related technical field.

About the Company

Company: Chips &Media

Headquarters: Seoul, South Korea

South Korea–based semiconductor company specializing in video codec IP and related hardware IP development, including RTL design, verification, FPGA development, and customer support for multimedia semiconductor solutions.