RFIC - PLL Design Engineer

Role Summary

The RFIC team at Apple designs and validates radio transceivers integrated within complex wireless SoCs. As a Senior RFIC - PLL Design Engineer, you will play a crucial role in the wireless SoC design group, significantly impacting the development of Apple’s advanced wireless connectivity solutions.

Experience Level

This position requires a minimum of 10 years of relevant industry experience, with a strong background in both analog and digital PLL design.

Responsibilities

As an RFIC - PLL Designer, your main responsibilities will include:

• Designing and developing analog and digital PLL solutions for wireless SoCs.
• Driving PLL design components to mass production for Apple’s wireless connectivity products.
• Working closely with other engineering teams to meet system requirements and specifications.
• Performing silicon characterization and debugging of PLL designs.

Requirements

The ideal candidate will have:

• A Bachelor’s degree in electrical engineering or a related field with over 10 years of experience in the industry.
• Hands-on experience designing PLL building blocks, including TDCs, digital filters, and VCOs/DCOs.
• A solid understanding of RF circuit design, including LNAs, PAs, and mixers.
• Proficiency in industry-standard design tools such as Cadence Virtuoso, Spectre RF, and Matlab.

Education Requirements

A Bachelor’s degree in Electrical Engineering or a related field is required; a Ph.D. degree is preferred.