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R&D Hardware Engineer (High Speed Analog)

Broadcom
May 17, 2026
Full-time
On-site
San Jose, California, United States
$120,000 - $192,000 USD yearly
ASIC Design Jobs, Level - Mid-Career

Job Title

R&D Hardware Engineer (High Speed Analog)

Role Summary

Design and develop high-speed analog circuits for wireline transceivers within an R&D hardware engineering team. The role focuses on circuit-level design, lab validation, and collaboration with layout, product, and vendor teams to bring high-performance analog front-end and clocking solutions to production.

Work areas include high-speed ADCs/DACs, high-frequency low-jitter PLLs, low-noise TIAs and laser drivers, equalization for backplanes and optical links, and clock and data recovery. Salary range: USD 120,000 - 192,000 annual; eligible for discretionary bonus and equity.

Experience Level

Mid-level — typically 5+ years of relevant industry experience (or 3+ years with a relevant advanced degree).

Responsibilities

Key responsibilities include design, verification, and experimental evaluation of high-speed analog hardware and components.

  • Architect, design, and simulate high-speed analog circuits for wireline transceivers.
  • Define design approaches and parameters; select components and parts based on specifications and reliability.
  • Plan and execute lab experiments, analyze measurement data, and iterate on designs.
  • Perform layout-aware design work using CAD and collaborate with layout engineers.
  • Evaluate vendor capabilities and collaborate with suppliers to support product development.
  • Work on moderate-scope technical problems, exercising engineering judgment within established practices.
  • Build and maintain productive cross-functional internal and external relationships.

Requirements

Must-have technical skills and experience.

  • Proven experience in high-speed analog circuit design for wireline or optical transceivers.
  • Hands-on experience with high-speed ADC/DAC, PLLs, TIAs, laser drivers, equalization, or CDR circuits.
  • Experience with high-frequency, low-jitter clock design and low-noise, high-linearity analog design techniques.
  • Proficiency with circuit simulation and CAD tools; familiarity with layout constraints and layout-driven design.
  • Lab experience: setting up measurements, characterizing jitter, noise, linearity, and signal integrity at multi-gigabit rates.
  • Strong problem-solving skills and ability to work across design, layout, test, and vendor teams.

Education Requirements

Bachelor's degree in Engineering or Computer Science with 5+ years of related experience, or a Master’s degree in Engineering or Computer Science with 3+ years of related experience. Equivalent practical experience may be considered.


About the Company

Company: Broadcom

Headquarters: Irvine, California, United States

Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.

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Date Posted: 2026-05-15