Role Summary
The R&D Engineering Staff Engineer at Synopsys is responsible for developing advanced CMOS embedded memories. The role emphasizes collaboration with various engineering teams to drive automation, verification, and enhance memory design processes.
Experience Level
Senior; minimum of 5 years of experience in memory design.
Responsibilities
The key responsibilities include:
- Develop CMOS embedded memories such as SP SRAM, DP SRAM, Register File, and ROM.
- Design architecture and circuit implementation focused on ultra-high-speed, ultra-low-power, and high-density designs.
- Perform schematic entry, circuit simulation, layout planning, and layout supervision.
- Interface with CAD and Frontend engineers for memory compiler automation and full verification flow.
- Conduct bit cell development and verification, driving physical layout design.
- Support and perform other duties as assigned and required.
Requirements
Must-have qualifications include:
- Bachelor’s or master’s degree in Electrical Engineering, Telecommunication, or related fields.
- Proficiency in CMOS memory design, circuit simulation, and knowledge of layout verification tools.
- Programming expertise in C-Shell and Perl; familiarity with C++ or JavaScript is noted as a plus.
- Strong analytical and problem-solving skills with meticulous attention to detail.
Education Requirements
Bachelor’s or master’s degree in Electrical Engineering, Telecommunication, or a related field is required.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-03-10