R&D Engineering Architect

Role Overview

The R&D Engineering Architect at Synopsys is responsible for architecting hardware-assisted verification solutions including emulation and prototyping platforms. The individual will need to define technical requirements and performance benchmarks for new verification products and ensure integration within cross-functional teams.

Position Summary

This role focuses on driving innovation in hardware verification methodologies. The architect will be adept at managing complex system-level requirements and translating them into scalable architecture, while maintaining a balance between hands-on engineering and strategic oversight.

Experience Level

This position requires extensive experience in hardware verification, emulation, and prototyping, ideally with focus on FPGA-based and/or custom platforms. A proven track record of architecting complex verification solutions is essential.

Principal Duties

• Develop hardware-assisted verification solutions to accelerate verification cycles for silicon design.
• Define system-level requirements and benchmarks for verification products.
• Collaborate with engineering teams to optimize verification methodologies.
• Guide the development of architectures that integrate complex designs.
• Research and integrate emerging verification technologies.
• Mentor junior engineers and support team professional growth.

Necessary Skills

• Expertise in hardware verification, emulation and prototyping.
• Familiarity with verification methodologies such as UVM, OVM, SystemVerilog.
• Experience in SoC/IP design and performance optimization.
• Proficiency in conducting technical analyses and trade-off studies.
• Knowledge of hardware/software co-verification techniques.

Education Requirements

A relevant degree in engineering or computer science is expected, along with demonstrated qualifications in a similar field.