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Quantum Packaging Signal/Power Integrity (SI/PI) Engineer

Intel Corporation
September 25, 2026
Full-time
On-site
Hillsboro, Oregon, United States
$141,910 - $200,340 USD yearly
Physical Design Jobs, Level - Mid-Career

Job Title

Quantum Packaging Signal/Power Integrity (SI/PI) Engineer

Role Summary

Join Intel's Quantum Computing Group in Hillsboro to model and simulate packaging solutions for silicon quantum dot processors. The role focuses on SI/PI and system-level simulation of redistribution layers, interposers, IC substrates and related packaging hardware within a multidisciplinary development team.

This position supports design decisions for scalable quantum systems by delivering validated simulations, design documentation, and clear technical communication to theory and hardware stakeholders.

Experience Level

Mid-level. Typical candidates have 3+ years of SI/PI experience with packaging or a Ph.D. in a related field with relevant experience.

Responsibilities

Primary responsibilities include modeling, simulation, and cross-team delivery of packaging SI/PI work.

  • Model and simulate packaging hardware including redistribution layers (RDLs), interposers, IC substrates, and silicon testchip routing.
  • Perform system-level, end-to-end simulations to validate designs against system requirements.
  • Work with theory and hardware teams to translate requirements into engineering designs; contribute to requirements for pathfinding projects.
  • Analyze SI/PI and thermal impacts on substrate and packaging design choices.
  • Deliver design milestones, documentation, and presentations to stakeholders.
  • Maintain technical awareness of packaging and SI/PI methods through literature and conferences.

Requirements

Must-have technical skills and workplace capabilities.

  • Practical experience with SI/PI modeling, simulation, and optimization using tools such as SIwave, HFSS, ADS, or equivalent.
  • Experience assessing SI/PI and thermal impacts on IC substrate and packaging design choices.
  • Design experience with large form-factor IC substrates and packaging layouts.
  • Strong technical communication and presentation skills for both technical and non-technical audiences.
  • Analytical problem-solving skills and ability to work collaboratively across diverse teams in a research environment.
  • Adaptability to fast-paced, exploratory development projects.
  • Preferred: experience with testchip SI software and large-scale automation (e.g., RaptorH/X).

Education Requirements

Minimum: M.S. in Electrical Engineering, Physics, or a related field plus 3+ years of SI/PI experience for packaging or silicon testchips. Alternatively, a Ph.D. in Electrical Engineering, Physics, or a related field with relevant academic or work experience satisfies the minimum. (Equivalent practical experience may be considered where indicated.)


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-09-23