Quantum Interposer Design Engineer
Intel CorporationJob Title
Quantum Interposer Design Engineer
Role Summary
Responsible for physical design and integration of advanced packaging interposers used in silicon-based quantum processors. Work within Intel's Quantum Computing Group in Hillsboro on cross-functional teams to meet electrical, thermal, and system integration requirements.
Experience Level
Mid-level - typically 5+ years of relevant physical design experience. Candidates with equivalent industry experience or strong research background are considered.
Responsibilities
Design, validate, and deliver interposer layouts and documentation; coordinate with stakeholders to meet electrical, thermal, and system requirements.
- Physical design and integration of interposers for advanced packaging in quantum systems.
- Coordinate with silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers to meet requirements.
- Perform design validation and verification, including DRC and LVS checks.
- Deliver design milestones and handoffs to stakeholders; prepare technical presentations and documentation.
- Address SI/PI and thermal issues during layout and packaging design iterations.
- Maintain awareness of developments in packaging technology and applicable design techniques.
Requirements
Core technical skills and professional capabilities required for immediate impact.
Must-have:
- Proven experience in physical design of silicon testchips, interposers, or related hardware.
- Hands-on experience with Cadence Virtuoso.
- Practical understanding of how signal integrity (SI) and power integrity (PI) affect physical design.
- Familiarity with advanced packaging technologies and related layout constraints.
- Experience with design validation workflows (DRC/LVS) and delivering design milestones.
- Strong communication, collaboration, analytical thinking, and problem-solving skills.
Nice-to-have:
- Knowledge of superconducting metals and their impact on packaging and layout.
- Experience using Synopsys and Ansys toolsets for automated place-and-route and simulations.
- Prior work in quantum device packaging or similar research environments.
Education Requirements
M.S. degree in Electrical Engineering plus 5+ years of relevant physical design experience, or a Ph.D. in Electrical Engineering with related academic or work experience. Requirements may be met via a combination of industry experience, internships, coursework, or research.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
