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Quantum IC Package Substrate Design Engineer

Intel Corporation
September 25, 2026
Full-time
On-site
Hillsboro, Oregon, United States
$122,440 - $172,860 USD yearly
Physical Design Jobs, Level - Mid-Career

Job Title

Quantum IC Package Substrate Design Engineer

Role Summary

Design large form-factor IC substrates for silicon quantum-dot processors as part of Intel's Quantum Computing Group. The role works within a multidisciplinary team responsible for substrate layout, validation, and integration with silicon, SI/PI, thermal, and system integration stakeholders.

Work focuses on substrate/package layout, design verification, and tapeout coordination to support scalable quantum systems.

Experience Level

Mid-level. Typical experience expectation: M.S. + 3+ years in IC substrate design or B.S. + 5+ years in IC substrate design (see Education Requirements for details).

Responsibilities

Primary responsibilities include substrate layout, design validation, and collaboration with cross-functional teams.

  • Create IC substrate layouts using Siemens Xpedition and related tools.
  • Implement high-speed signal routing and power distribution for large form-factor substrates.
  • Perform design validation and verification, including DRC and LVS checks.
  • Integrate advanced packaging concepts (2.5D and 3D) with substrate designs.
  • Coordinate tapeout activities with substrate suppliers and internal substrate teams.
  • Incorporate feedback from silicon testchip, SI/PI, thermal simulation, and system integration engineering teams.
  • Document designs and present design milestones to stakeholders.
  • Stay current with packaging technology and apply best practices to substrate layouts.

Requirements

Must-have technical skills and professional capabilities. Preferred items listed separately.

  • Hands-on experience with Siemens Xpedition design environment and workflows.
  • Proven experience in high-speed signal routing on large form-factor IC substrates.
  • Experience with design validation/verification workflows, including DRC and LVS.
  • Experience integrating advanced packaging (2.5D/3D) concepts into substrate designs.
  • Practical experience coordinating tapeout with substrate suppliers and internal teams.
  • Ability to work with SI, PI, and thermal engineering inputs and incorporate those constraints into layouts.
  • Strong communication and presentation skills for technical and non-technical audiences; collaborative mindset.
  • Analytical problem-solving skills and adaptability in a research-oriented environment.
  • Nice-to-have: experience with advanced routing engines (AI or physics/model-based) and thermal/SI/PI simulation tools.

Education Requirements

Minimum: B.S. in Electrical Engineering, Computer Engineering, or a related field plus 5+ years of IC substrate design experience, OR M.S. in Electrical Engineering, Computer Engineering, or a related field plus 3+ years of IC substrate design experience. Qualifications may be met through a combination of industry experience, internships, coursework, or research. No specific certifications were listed.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-09-23