This position involves the design and development of verification strategies for complex systems. As a Principal Verification Architect, you will be responsible for leading verification projects, ensuring high-quality verification standards, and identifying areas for improvement. The role requires collaboration with software and hardware engineers to establish a seamless verification process.
The ideal candidate should possess significant experience in verification methodologies and be capable of handling complex engineering tasks. This includes familiarity with industry standards and best practices in verification architecture.
Strong proficiency in verification methodologies (e.g., UVM, SystemVerilog) is essential. The candidate should be capable of working independently and possess excellent problem-solving skills. Additionally, experience with functional verification and a background in both software and hardware interfaces are important.
A master's degree in Electrical Engineering, Computer Engineering, or a related field is preferred. Equivalent experience will also be considered.