Principal Static Timing Analysis (STA) Engineer – SoC Design

Role Summary

The DCE team at Marvell is seeking a Principal Static Timing Analysis (STA) Engineer to contribute to a wide range of innovative projects, utilizing the latest technology nodes. This role involves close collaboration with Physical Design, Design for Test (DFT), and other cross-functional teams.

Experience Level

Senior level; 5-15 years of experience based on education.

Responsibilities

The candidate will be responsible for the following key tasks:

• Lead timing closure for sub-system/partition or full-chip level designs.
• Collaborate with RTL, DFT, and IP teams to drive iterative timing feedback and closure.
• Deliver timing collateral and signoff reports per project milestones.
• Perform timing correlation between PD tools and signoff tools; support early feasibility studies.
• Generate and push down ECOs to block-level teams.
• Mentor junior engineers and provide technical leadership across teams.
• Develop automation scripts in Perl, Python, and TCL to improve timing workflows.
• Manage timing constraints compatible with synthesis, P&R, and STA tools.

Requirements

Ideal candidates should possess the following qualifications:

• Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 10-15 years of experience, or a Master’s degree/PhD with 5-10 years of experience.
• Proven success in timing analysis and closure across multiple ASICs/SoCs.
• Experience with advanced timing concepts: SI, CDC, LVF, POCV, etc.
• Proficiency in STA tools (e.g., Synopsys PrimeTime), scripting, and UNIX environments.
• Strong communication skills and an ability to work independently and collaboratively.
• Experience leading timing closure efforts across teams is preferred.
• Familiarity with timing methodology and flow development is preferred.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or related fields, or an equivalent combination of education and experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.