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Principal Simulation R&D Software Engineer

Synopsys
April 01, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Level - Senior

Role Summary

The Principal Simulation R&D Software Engineer will be involved in designing, developing, and troubleshooting core algorithms for compilers, focusing on enhancing runtime performance for Verilog compilers and driving technological innovation in chip design.

Experience Level

Senior, with 6 - 15 years of experience.

Responsibilities

Key responsibilities include:

  • Designing, developing, and troubleshooting core algorithms for compiler.
  • Collaborating with local and global teams to enhance runtime performance for Verilog compiler.
  • Engaging in technical roles focused on software development and architecture.
  • Utilizing knowledge of digital simulation flows and EDA tools to drive innovation.
  • Leveraging expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions.

Requirements

Must-have skills and qualifications:

  • Strong hands-on experience in C/C++ based software development.
  • Deep understanding of design patterns, data structures, algorithms, and programming concepts.
  • Knowledge of ASIC design flow and EDA tools and methodologies.
  • Proficiency in Verilog, SystemVerilog, and VHDL HDL.
  • 10+ years of relevant EDA software experience, preferably in the simulation domain.

Education Requirements

Not specified.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-04-01