Principal Product Validation Engineer

Role Summary

Looking for a highly motivated engineer to join the Modus R&D team, focusing on validating and supporting Design-for-test (DFT) technologies. The role requires strong experience in DFT/ATPG/ASIC design flows and excellent communication skills for interfacing with Product Engineers and R&D.

Experience Level

7+ years of experience in DFT/ATPG/ASIC Design flows.

Responsibilities

• Work as a DFT Product Validation Engineer on insertion and validation of DFT technologies.
• Create test plans for verification of new features and execute them by developing new test cases.
• Report bugs and enhancements in the tool.
• Collaborate with R&D and Product Engineering teams to review specifications, test plans, and customer issues.
• Debug customer-reported issues and implement solutions.

Requirements

• B.E. in Electronics/Electrical.
• Strong background in Digital electronics and Verilog.
• Good understanding of DFT techniques and methodologies.
• Familiarity with Test standards like 1149.1, 1500, 1687 is a plus.
• Experience with Cadence Test or other Test tools is preferred.
• Good scripting skills (Tcl, Perl).
• Strong analytical and problem-solving skills.
• Good communication skills.
• Keen learner ready to learn new things with little guidance.

Education Requirements

B. Tech/BE/M. Tech / M.E.