Principal Memory Controller RTL Design Engineer
The Principal Memory Controller RTL Design Engineer will define and implement memory controller micro-architecture and RTL, optimize for area/power/performance, and integrate functional IP into SoC platforms for Microsoft cloud hardware. The role sits in Compute Silicon & Manufacturing Engineering within Microsoft Silicon and supports large-scale cloud infrastructure.
Principal / Senior-level. The posting defines required experience via degree/experience combinations (see Education Requirements). Preferred candidates typically have 10+ years of memory-controller design experience, especially with high-performance DDR4/DDR5 controllers.
Key responsibilities include RTL design, verification support, and cross-team integration.
Must-have items and important role constraints; preferred skills follow.
Degree and experience combinations accepted: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field plus 3+ years technical engineering experience; OR Master’s in those fields plus 6+ years; OR Bachelor’s in those fields plus 8+ years; OR equivalent practical experience. Fields called out include Electrical Engineering, Computer Engineering, and Computer Science. Equivalent experience is explicitly allowed.
Company: Microsoft
Headquarters: Redmond, Washington, United States
Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.
