Job Title
Principal Logic Design Engineer
Role Summary
The Principal Logic Design Engineer will develop and optimize mixed-signal and high-speed IPs for integration into full-chip designs. The role involves participation in design development tasks throughout the IP development flow.
Experience Level
Senior, with over 15 years of experience required.
Responsibilities
Key responsibilities include:
- Participating in design development tasks throughout the IP development flow.
- Developing logic design, RTL coding, and simulation for IP.
- Creating cell libraries, functional units, IP blocks, and subsystems for full-chip integrations.
- Applying strategies, tools, and methods for RTL writing and logic optimization.
- Involvement in design and simulation example creation, IP integration, and release processes.
- Conducting hardware verification and failure debugging.
Requirements
Qualifications include:
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 15+ years of relevant experience.
- Proficiency in System Verilog, VCS/Synopsys simulators, linting, and synthesis.
- Programming experience with C/C++, Perl, Python, TCL, or Unix Shell scripts.
- Experience in FPGA design and programming is a plus.
- Familiarity with RTL validation is a plus.
- Strong communication and problem-solving skills.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
About the Company
Company: Altera
Headquarters: Bengaluru, Karnataka, India
Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

Date Posted: 2026-03-10