Principal Infinity Fabric Verification Engineer

Role Summary

The Infinity Fabric transport layer verification team is seeking a seasoned pre-silicon verification engineer. This role involves the verification of configurable switches and die-to-die interconnect, critical to all new AMD products across various markets, including AI, Client, Server, Graphics, and Semi-Custom. You will be part of a growing team, aiding in the enhancement of our testbench and mentoring junior engineers.

Experience Level

This position is aimed at candidates with significant industry experience, especially in verifying complex design blocks at the IP or SoC level using SystemVerilog/UVM or related technologies. An ideal candidate should also possess strong leadership skills in managing verification teams and have a solid track record of achieving silicon design and verification closure.

Responsibilities

• Create project schedules and staging plans for new features.
• Develop and enhance SystemVerilog / UVM-based testbenches for AI & Server products.
• Collaborate with architects, RTL designers, and performance engineers to deepen understanding of Infinity Fabric architecture.
• Lead verification engineers in executing the verification process within project timelines.
• Engage with project management to effectively stage new developments in Infinity Fabric.
• Mentor junior verification engineers.

Requirements

Preferred candidates should have substantive industry experience, a strong understanding of Systems & SoC architecture, and expertise in areas such as CPU or GPU, memory subsystems, and I/O subsystems. Skills in architecting and developing verification environments in SystemVerilog or C++ is crucial, along with experience in scripting (e.g., Perl, Ruby). Excellent communication and management abilities are necessary to lead teams effectively.

Education Requirements

A Master’s degree in a related discipline is preferred for this role.