Principal IC Package Design Engineer

Job Title

Principal IC Package Design Engineer

Role Summary

We are seeking an experienced IC Package Design Engineer with strong expertise in flip-chip package design and IC-Package-PCB co-design, focusing on signal integrity (SI), power integrity (PI), and thermal optimization. The role requires close collaboration with cross-functional teams and customers to deliver optimized, cost-effective, and high-performance package solutions.

Experience Level

Senior; 10+ years of relevant experience required.

Responsibilities

Key responsibilities include:

• Lead flip-chip package design with a strong focus on SI/PI and thermal constraints.
• Drive IC–Package–PCB co-design, balancing performance, power, cost, technology, and thermal trade-offs.
• Collaborate closely with cross-functional teams and customers to define and deliver optimal end-to-end solutions.
• Support die floorplanning, IO placement, and perform bump definition, routing feasibility analysis, and optimization of Package stack-up, BGA ball map and PCB design interfaces.
• Execute 2D/3D EM simulations and apply electromagnetic and transmission line theory to package design challenges.
• Extract and analyze S-parameters and RLGC models to ensure package compliance with SI/PI requirements.
• Validate package and PCB designs in the lab, correlating measurements with simulation results.
• Provide clear, concise program status updates to management, highlighting risks, issues, and mitigation plans.
• Drive process improvements, methodology development, innovation, and efficiency gains in package design flows.
• Mentor and support team members while contributing as an individual technical expert.
• Experience with various Cadence Allegro tools (APD/SIP, PCB Editor) and various modeling tools (Cadence Sigrity PowerSI, ExtractIM, Clarity 3D).
• Experience in working with different DRAM protocols, DDR4/5, GDDR6/7, HBM3/4, LPDDR5/6.
• Strong understanding of package cost vs. performance trade-offs.
• Proven ability to work independently and in cross-functional teams.
• Highly motivated, proactive, and eager to continuously acquire new skills.

Requirements

Must-have qualifications include:

• Experience with IC package design, focusing on flip-chip technologies.
• Strong background in signal integrity and power integrity analysis.
• Proficiency with relevant Cadence tools and methodologies.
• Bachelor's or Master's degree in Electrical/Electronics Engineering or related field.

Education Requirements

BE/BTech or MTech in Electrical/Electronics Engineering or equivalent.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.