Job Title
Principal Engineer - Subsystem CoE Emulation
Role Summary
Lead emulation engineering for SoC subsystems within the Emulation Center of Excellence (CoE) in the Custom Compute and Storage business unit. Deliver scalable emulation infrastructure, enable pre-silicon validation, and support firmware and software readiness across multiple subsystems.
Collaborate with RTL, verification, firmware, and software teams to integrate hardware models, run system validation, and resolve cross-domain issues on industry emulation platforms.
Experience Level
Senior — principal-level role. Preferred experience: 10+ years in SoC emulation, validation, or related silicon engineering.
Responsibilities
Lead subsystem and full-chip emulation activities and provide technical leadership for pre-silicon validation and software enablement.
- Develop and integrate complex SoC emulation models; perform environment setup, compilation, and debug on platforms such as Veloce, ZeBu, and Palladium.
- Lead emulation bring-up including clock/reset sequencing, firmware boot, and system validation using pre-silicon hardware models.
- Create and execute emulation test plans for verification, performance analysis, software development, and system validation.
- Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchains.
- Optimize emulation performance through model partitioning, timing adjustments, and runtime efficiency improvements.
- Automate flows and improve productivity via scripting and tooling (Python, Perl, Tcl, shell).
- Interface with EDA vendors to evaluate tools, resolve technical issues, and drive feature improvements.
- Enable firmware and software teams with stable, scalable emulation environments for boot, security, protocol, memory, and peripheral validation.
Requirements
Must-have technical skills and demonstrable experience.
- Extensive hands-on experience with SoC emulation and pre-silicon validation on platforms such as Palladium, ZeBu, or Veloce.
- Domain expertise in one or more: boot/system initialization, security validation, PCIe, CXL, Ethernet, DDR, HBM, USB 3.0, SPI, I2C, UART.
- Strong system-level understanding of SoC architecture, interconnects, and subsystem integration.
- Proven debugging skills across the hardware/software boundary and complex toolchains.
- Proficiency in scripting and automation (Python, Perl, Tcl, shell) to build and maintain flows and tools.
- Proven ability to lead cross-functional efforts and drive execution across RTL, verification, firmware, and software teams.
Education Requirements
Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 12+ years of relevant professional experience; or a Master’s degree and/or PhD in Computer Science, Electrical Engineering, or a related field with 10+ years of relevant professional experience.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-06-19