Principal Engineer, RTL Power Macromodeling

Role Summary

The Principal Engineer, RTL Power Macromodeling at Samsung Semiconductor will develop advanced power macromodels for AI computing memory component IPs, transforming RTL/SystemC/C behavior into accurate power models.

Experience Level

Senior level with 20+ years of experience for Bachelor's degree holders or 18+ years for Master's degree holders.

Responsibilities

As a Principal Engineer, you will be responsible for:

• Developing high-fidelity power macromodels using analytical modeling techniques.
• Extracting power features from simulations.
• Defining power-relevant functional states.
• Supporting trace-driven power modeling based on workload traces.
• Validating macromodel accuracy with reference results and real data.
• Collaborating with software engineers on feature semantics.
• Contributing to scalable power simulation.

Requirements

Key requirements include:

• Bachelor's or Master's degree in a relevant field.
• Extensive experience with RTL design using Verilog/systemVerilog.
• Understanding of power mechanisms in CMOS.
• Hands-on experience with logic synthesis and power analysis tools.
• Experience in power modeling in academia and industry.
• Ability to create compact analytical and AL/ML models.
• Knowledge of power estimation flows and architectural power analysis.

Education Requirements

A Bachelor's degree with 20+ years of experience or a Master's degree with 18+ years of experience.

About the Company

Company: Samsung Semiconductor

Headquarters: San Diego, California, United States

Samsung Semiconductor is a global leader in semiconductor technology, providing innovative solutions for diverse applications including smartphones, electric vehicles, and data centers. As part of Samsung's Advanced Institute of Technology, the company focuses on cutting-edge research in areas such as CPU microarchitecture, AI, and HPC, fostering a diverse and inclusive work environment for its employees to thrive and innovate.