Principal Engineer - Memory Compiler Circuit Design

Job Title

Principal Engineer - Memory Compiler Circuit Design

Role Summary

The Principal Engineer will lead the creation and optimization of customizable memory instances and compilers for semiconductor chips. This role involves defining architectures, mentoring teams, and ensuring integration, necessitating deep expertise in analog/digital design and EDA tools.

Experience Level

Senior level, typically requiring significant experience in custom analog/digital design, ideally with experience in deep sub-micron nodes.

Responsibilities

The key responsibilities include:

• Develop high-performance, low-power memory IP and compiler architectures.
• Drive design methodologies for power, performance, and area targets.
• Enhance compiler flows and design libraries using scripting.
• Mentor junior engineers in circuit design practices.
• Collaborate with cross-functional teams and foundries.
• Define technical direction, review designs, and ensure tape-out readiness.

Requirements

Essential skills and qualifications include:

• Custom memory circuit design (sense amps, periphery), analog/digital CMOS.
• Proficiency in Cadence and Synopsys tools.
• Experience with deep sub-micron nodes and foundry PDKs.
• BSEE or related technical degree; MSEE preferred.

Education Requirements

A degree in Electrical Engineering (BSEE or MSEE preferred) or a related technical field is required.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.