Principal Engineer, Hardware & Silicon Validation

Role Summary

The Principal Engineer, Hardware & Silicon Validation at Marvell is responsible for delivering high bandwidth over long distances through analog validations on amplifiers for optical devices and receivers. This role involves validation of silicon photonics, upper electronic measurements, and support for the coherent digital signal programming unit, working with cutting-edge technologies for both internal and external customers.

Experience Level

Senior level with 10-12 years of relevant work experience for B.Sc. in Electrical Engineering or more than 10 years for M.Sc. in Electrical Engineering.

Responsibilities

Key responsibilities include:

• Complete responsibility for PHY Validation in a post-silicon environment.
• Defining, documenting, executing, and reporting the validation/test plan for Marvell storage devices.
• Lab-based silicon bring-up and unit test execution focused on Physical and PCS layer hardware and firmware.
• Perform high-speed signal validation and analysis using test equipment for measurements like Eye diagram/Jitter/BER.
• Analyze and debug PHY protocol issues related to storage interfaces (SATA, SAS, PCIe, Ethernet).
• Troubleshoot failed tests using diagnostics, software tools, hardware analyzers, oscilloscopes, meters, and logic/protocol analyzers.
• Lead technical discussions to drive resolution on issues.
• Collaborate with teams and vendors to resolve post-silicon or customer issues regarding Ethernet/PCIe PHY.
• Address design issues with customers and debug failure cases.

Requirements

Preferred qualifications include:

• Bachelor of Science in Electrical Engineering or Master of Science with extensive experience.
• Strong understanding of high-speed SERDES and equalization techniques.
• Proven experience in High-Speed IO testing and debugging with solid lab skills.
• In-depth knowledge of test equipment used for SERDES characterization.
• Working knowledge of board design and ability to read schematics.
• Knowledge in SERDES modeling techniques and experience with Perl or Python.
• Understanding of PCIe and/or SAS/SATA SERDES and high-speed interface protocols is a plus.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering is required.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.