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Principal Engineer - ASIC Digital Design

Synopsys
Full-time
On-site
Munich, Germany
Level - Senior

Role Summary

The Principal Engineer - ASIC Digital Design position focuses on leading the design and verification of complex ASIC blocks at Synopsys. This role is integral to the development of high-performance technology, requiring collaboration and expertise in digital design.

Experience Level

Applicants should possess extensive experience in ASIC digital design and verification, specifically with a strong background in RTL design. Ideal candidates will have a proven track record in handling intricate design challenges.

Responsibilities

The responsibilities of this role include:

  • Leading the design and verification of complex ASIC blocks and systems.
  • Collaborating with cross-functional teams to ensure seamless integration.
  • Developing test plans to verify functionality and performance.
  • Utilizing EDA tools to optimize design performance.
  • Mentoring junior engineers and providing guidance.
  • Staying updated with industry trends and methodologies.

Requirements

Candidates must meet the following requirements:

  • Extensive experience in ASIC digital design and verification.
  • Proficiency in EDA tools and understanding of High-Performance Interface IP protocols.
  • Strong analytical and problem-solving capabilities.
  • Excellent communication skills for effective collaboration.

Education Requirements

A degree in Electrical Engineering or a related field is preferred, along with significant hands-on experience in ASIC design and verification.