Job Title
Principal Engineer, Applications Engineering (Physical Design)
Role Summary
Senior applications engineer focused on physical design enabling customers to adopt and optimize Synopsys' RTL-to-GDS tool flows. The role sits in the Applications Engineering team and works across product engineering and R&D to solve complex customer design problems and influence tool development.
Primary mission: provide hands-on customer enablement, technical support, training, and feedback to improve physical design flows and Synopsys tools for advanced semiconductor nodes.
Experience Level
Senior — requires extensive industry experience. The posting specifies 15+ years of experience with the complete RTL-to-GDS physical design flow.
Responsibilities
The role combines customer-facing technical enablement with internal collaboration to improve tools and flows.
- Engage directly with customers to understand requirements and deliver tailored physical-design solutions.
- Provide hands-on demonstrations, support, workshops, and training for Synopsys physical-design tools (e.g., Fusion Compiler, PrimeTime).
- Diagnose and resolve complex design issues across synthesis, place & route, timing closure, power optimization, DRC/ECO, and formal verification.
- Collaborate with R&D and Product Engineering to relay customer feedback and drive tool enhancements.
- Produce technical collateral, run benchmarks, and present best practices to customers and internal teams.
- Mentor and develop junior engineers within the Applications Engineering team.
Requirements
Must-have technical skills and experience; nice-to-have items listed separately.
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Must-have: 15+ years of hands-on experience with the complete RTL-to-GDS physical design flow, including advanced nodes.
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Must-have: Deep expertise in synthesis, design planning, place & route, timing closure, power reduction methodologies, static timing analysis, ECO flows, and DRC rules.
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Must-have: Proficiency with industry EDA tools such as Fusion Compiler, PrimeTime, PrimeClosure, Formality, DSO.ai, ICV, StarRC, and RTLA.
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Must-have: Strong analytical and problem-solving skills and proven ability to diagnose complex design and tool issues.
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Must-have: Excellent communication skills and customer-facing experience, including technical presentations and workshops.
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Nice-to-have: Familiarity with Innovus, Genus, Tempus, Quantus, Cerebrus and experience working with AI/ML applied to EDA workflows.
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Nice-to-have: Experience building or deploying AI agents or working with LLMs and GPT-style models for design automation.
Education Requirements
Bachelor's and/or Master's degree in Electrical Engineering or a related field (the posting specifies these degrees). Equivalent practical experience in relevant semiconductor physical design may be considered if stated by the employer.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

Date Posted: 2026-04-27