Principal Engineer
Senior verification engineer in the Connectivity Business Unit responsible for developing and executing verification environments and test plans for SoC blocks. The role focuses on simulation-based verification (UVM/SystemVerilog), formal verification, debugging, and collaborating with logic designers to achieve coverage and correctness.
Works with cross-functional teams to improve verification flows and deliver robust RTL quality for high-speed connectivity products.
Level: Senior. Typical guideline: BS in Computer Science or Electrical Engineering with 8+ years of relevant experience, or MS with 6+ years of related experience.
Primary responsibilities include creating verification environments, executing tests, debugging, and collaborating with designers.
Key technical and interpersonal requirements. Must-have items first, followed by nice-to-have items.
Must-have:
Nice-to-have:
BS in Computer Science or Electrical Engineering with 8+ years of relevant experience, or MS with 6+ years of related experience.
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
