Job Title
Principal, Design Verification Engineer, UAL and PCIe Subsystems
Role Summary
Lead design verification efforts for UAL and PCIe subsystems within multi-core SoCs. You will define verification architecture, develop reference models and bus-functional monitors/drivers, and create verification methodology and tools to ensure designs meet customer and product requirements.
Work within the Design Verification team and collaborate closely with RTL designers, firmware and system teams to validate high-speed data-transfer silicon.
Experience Level
Senior-level. The posting indicates typically 10–12 years of relevant professional experience.
Responsibilities
Main responsibilities focus on building and executing verification environments, driving coverage closure, debugging, and tool development.
- Architect and implement functional verification environments, including reference models, BFMs/monitors, and drivers.
- Write detailed verification test plans using constrained-random techniques and coverage analysis.
- Develop directed and random tests and tune environments to achieve coverage goals.
- Debug functional failures, perform root-cause analysis, and work with designers to resolve issues.
- Verify boot code and contribute to tools and automation for multi-core SoC development.
- Perform unit and regression testing of verification software and tools.
Requirements
Key technical requirements and desirable skills.
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Must-have: Strong experience with SystemVerilog and UVM for functional verification.
- Proven experience writing detailed test plans and building advanced directed/random verification environments.
- Proficiency with scripting languages (Python or Perl) and familiarity with EDA verification tools.
- Experience with object-oriented design and implementation.
- Working knowledge of Linux operating systems and strong debugging skills.
Nice-to-have:
- Experience programming in C++ and ARM assembly.
- Prior working knowledge of UAL and PCIe protocols.
- Experience developing verification-related software tools and scalable automation.
- Ability to work independently, detail-oriented, and comfortable in a fast-paced environment.
Education Requirements
BS, MS, or PhD in Computer Science, Electrical Engineering, or Computer Engineering. The posting specifies approximately 10–12 years of relevant professional experience for this principal role.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-05-03