Principal Design Verification Engineer (Silicon Engineering)

Company Overview

SpaceX is engaged in the development of technologies with the goal of enabling human life on Mars while deploying Starlink, a cutting-edge broadband internet system.

Role Overview

The Principal Design Verification Engineer will work on developing next-generation ASICs critical for enabling connectivity through the Starlink network. This role requires collaboration with multi-disciplinary teams dedicated to building and operating advanced satellite technologies for global communication.

Experience Level

Candidate should possess at least 10 years of relevant experience in design verification, demonstrating deep knowledge and skill in complex digital designs.

Key Responsibilities

• Conduct digital ASIC and/or FPGA verification at both block and system levels.
• Lead verification test plans, ensuring milestones are met from start to finish.
• Engage in pre-silicon and post-silicon validation activities, chip bring-up, and implement comprehensive verification strategies.
• Be proactive and capable of independently executing full verification processes for complex designs.

Position Requirements

• Bachelor’s degree in electrical engineering, computer engineering, or computer science.
• 10+ years of experience in design verification and test bench development.

Education Requirements

• Advanced degrees in electrical engineering or computer engineering are preferred.

Preferred Skills and Experience

• Knowledge of verification methodologies such as UVM/OVM/VMM.
• Proficient in object-oriented programming and skilled in problem-solving.
• Familiarity with scripting languages such as Python for automation tasks.
• Experience in RTL design, chip bring-up, and post-silicon validation.
• Ability to adapt to a dynamic work environment with evolving requirements.

Additional Information

Willingness to work extended hours or weekends as necessary.