Principal Design Verification Engineer

Role Overview

The Principal Design Verification Engineer will be tasked with the verification of digital ASIC and/or FPGA designs used in SpaceX's ambitious projects, especially focusing on the Starlink satellite system. The role demands a proactive engineer who will actively engage in pre-silicon verification, chip bring-up, and post-silicon validation, ensuring that complex designs meet stringent performance and reliability standards.

Experience Level

This role requires a Senior-level engineer with substantial experience in design verification and test bench development.

Key Responsibilities

• Lead verification efforts for digital ASIC and FPGA at both block and system levels.
• Develop and execute comprehensive verification test plans.
• Collaborate on pre-silicon verification, chip bring-up, and post-silicon validation processes.
• Work independently and take initiative in verifying complex digital designs.

Position Requirements

The ideal candidate will possess a Bachelor’s degree in electrical engineering, computer engineering, or computer science, along with over 10 years of experience in design verification. Proficiency in various verification methodologies and strong coding skills are essential.

Education Requirements

Bachelor’s degree in electrical engineering, computer engineering, or computer science is required.