Principal Design Engineer – Custom Digital Hard Macros (Physical IP)

Role Overview

The Arm Solutions Engineering Physical IP group is setting up a new team focused on custom and semi-custom digital design. This includes the architecture, design, implementation, and silicon validation of hard macros that bridge digital logic and analog/mixed-signal domains.

Position Summary

As a Principal Design Engineer, you will be responsible for the technical ownership of hard-macro IP from concept through silicon. This involves defining design methodologies, mentoring engineers, and ensuring successful integration of the design into various Arm CPU, GPU, and SoC products.

Experience Level

The ideal candidate should have a minimum of 13 years of experience in custom digital or mixed-signal IP. Additionally, previous ownership of multiple silicon-proven hard macros is necessary.

Responsibilities

• Architect and design custom and semi-custom digital hard macros.
• Define specifications and implementation requirements for macros with mixed-signal interactions.
• Develop RTL for control, clocking, power, and boundary logic.
• Conduct end-to-end physical implementations and sign-offs at advanced process nodes.
• Generate and validate deliverables for SoC integration, including timing and power models.
• Analyze mixed-signal design issues and collaborate closely with verification teams.
• Provide silicon-level debug and correlation to improve design methodologies.

Requirements

Strong expertise in digital design with an understanding of analog effects on digital performance. Familiarity with synthesis, APR, STA, and physical verification, alongside hands-on experience in timing/power model generation, is essential. Leadership skills and prior mentoring experience will be critical to guiding less experienced team members.

Education Requirements

A degree in Electrical Engineering, Computer Engineering, or a related field is typically required for this role.