Principal Design Engineer

Role Summary

Lattice Semiconductor is seeking a Principal to join the HW design team focused on IP design and full chip integration. The role will focus on FPGA projects concentrated in Pune, India, and will ensure that complex components of FPGA meet performance, power, and area targets.

Experience Level

Level - Senior

Responsibilities

• Lead the design and development of complex components of FPGA.
• Drive logic design of key FPGA systems and full chip.
• Conduct regular reviews and audits of design quality.
• Work closely with architecture teams to define micro-architecture and design specifications.
• Serve as a technical expert in SoC design.
• Develop strong relationships with worldwide teams.
• Drive continuous improvement initiatives.
• Occasional travel as needed.

Requirements

• BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science or equivalent.
• 16+ years of experience in logic design across various silicon projects.
• Expertise in SoC integration and experience with ARM processors, AXI, and other protocols.
• Familiarity with FPGA designs and use-cases is a plus.
• Proven ability to work with multiple groups across different sites and time zones.

Education Requirements

BS/MS/PhD in Electronics Engineering, Electrical Engineering, Computer Science or equivalent.