Principal ASIC Verification Engineer

Role Overview

The Principal ASIC Verification Engineer will lead the design and verification of complex ASIC blocks and systems at Synopsys. This role emphasizes collaboration within cross-functional teams and requires a proactive approach to solving unique design challenges in a fast-paced environment.

Role Summary

As part of the ASIC Digital Design team, you will oversee the verification process of ASIC designs, ensuring all specifications are met. Your work will significantly contribute to enhancing the quality and performance of Synopsys' products.

Experience Level

This position is aimed at individuals with extensive experience in ASIC digital design and verification, particularly in RTL design.

Responsibilities

• Lead the design and verification of complex ASIC systems, ensuring they align with performance goals.
• Collaborate with cross-functional teams to integrate design components effectively.
• Develop and execute comprehensive test plans for design verification.
• Utilize advanced EDA tools for optimizing design performance and power efficiency.
• Mentor junior engineers, facilitating their professional growth.
• Keep abreast of industry trends and advancements to enhance personal skills and knowledge.

Requirements

• Proven experience in ASIC digital design and verification, especially with RTL design.
• Proficient in industry-standard EDA tools for design and verification processes.
• Strong understanding of High-Performance Interface IP protocols.
• Excellent problem-solving and analytical skills.
• Strong communication skills for effective collaboration with stakeholders.