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Principal Application Engineer

Synopsys
October 8, 2026
Full-time
On-site
Sunnyvale, California, United States
$184,000 - $276,000 USD yearly
EDA Jobs, Level - Senior

Job Title

Principal Application Engineer

Role Summary

Lead pre-sales technical engagements for Synopsys emulation and FPGA prototyping platforms (ZS5, ZeBu-200, HAPS) and ProtoCompiler. Work with sales and engineering teams to design, evaluate, and deploy hardware-assisted verification solutions for SoC, GPU, and AI designs.

Drive proof-of-concept projects, benchmarks, and customer deployments to shorten sales cycles, de-risk evaluations, and enable successful production use.

Experience Level

Senior - typically 10–12 years of relevant experience in emulation, FPGA-based prototyping, ASIC design, or SoC validation.

Responsibilities

Key responsibilities include technical leadership in customer-facing engagements and delivering demonstrable solutions that address partitioning, performance, debug, and integration challenges.

  • Lead pre-sales technical engagements and technical qualification for emulation and FPGA prototyping.
  • Design and present tailored hardware-assisted verification solutions addressing customer-specific constraints.
  • Deploy platforms at customer sites and guide setup, configuration, and initial bring-up.
  • Execute technical evaluations, proof-of-concept projects, and benchmarks to prove real-world value.
  • Collaborate with sales to qualify opportunities, handle technical objections, and advance deals.
  • Deliver product demonstrations, architecture reviews, and technical presentations to engineers and executives.
  • Build and maintain trusted advisor relationships with customer architects and engineering leaders.

Requirements

Must-have technical skills and practical experience for successful performance in the role.

  • 10+ years of hands-on experience with emulation, FPGA prototyping, ASIC design, or SoC validation (experience guidance retained in Experience Level).
  • Deep understanding of RTL-to-hardware workflows, scalable partitioning, clock-domain issues, and bring-up/debug challenges.
  • Strong command of FPGA architectures (Xilinx, Intel) and familiarity with synthesis flows.
  • RTL design experience in Verilog or VHDL and practical hardware bring-up and debug skills.
  • Ability to communicate technical tradeoffs and present data-driven responses to objections.
  • Comfortable with customer travel for on-site evaluations and engagements.
  • Nice-to-have: prior experience with ZS5, ZeBu-200, HAPS platforms, ProtoCompiler, or similar tools.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Computer Engineering, or a related field - or equivalent practical experience.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-06