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Principal Analog IC Design Engineer, High Speed SerDes

Cadence Design Systems
August 16, 2026
Full-time
On-site
San Jose, California, United States
$136,500 - $253,500 USD yearly
VLSI Design Jobs, Level - Senior

Job Title

Principal Analog IC Design Engineer, High Speed SerDes

Role Summary

Lead the design and development of analog and mixed-signal IC blocks for high-speed SerDes and I/O products, from specification through verification and delivery. The role sits on an IC design team focusing on high-performance, low-jitter transceivers and supporting analog circuitry.

Experience Level

Senior β€” requires a minimum of 7 years of CMOS SerDes or high-speed I/O IC design and development experience.

Responsibilities

Design, verify, and optimize analog/mixed-signal circuits for high-speed serial interfaces. Provide technical leadership on implementation and bring-ups.

  • Translate system and electrical specifications into analog/mixed-signal circuit designs and test plans.
  • Design and verify SerDes circuit blocks (driver, receiver, serializer, deserializer, phase interpolator, low-jitter PLL, high-speed clock distribution).
  • Design and verify supporting analog blocks (ADCs/DACs, bias/bandgap, voltage regulators).
  • Analyze and mitigate jitter, implement signal equalization and timing closure techniques.
  • Use CAD tools for circuit simulation, layout verification, and physical verification; collaborate with layout, DFT, and validation teams.
  • Support lab characterization and silicon bring-up; debug analog and mixed-signal issues in hardware.
  • Mentor engineers and contribute to design reviews and architecture decisions.

Requirements

Key technical skills and experience. Items listed as "nice-to-have" are desirable but not mandatory.

  • Must-have: Minimum 7 years of CMOS SerDes or high-speed I/O IC design and development experience.
  • Must-have: Strong understanding of jitter, timing, and signal equalization techniques.
  • Must-have: Proficiency with circuit simulation and layout tools for analog/mixed-signal design and verification.
  • Must-have: Proven experience designing driver/receiver/serializer/deserializer and PLL/clock-distribution circuits.
  • Must-have: Strong problem-solving skills, analog aptitude, and ability to work effectively in a team.
  • Nice-to-have: Experience with Cadence tools, lab test and silicon bring-up, design at >10 Gbps, and process nodes below 28 nm.
  • Nice-to-have: Familiarity with common SerDes standards and their electrical requirements.

Education Requirements

MS or PhD in Electrical Engineering.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-14