Principal Analog Circuit Design Engineer - SerDes

Job Title

Principal Analog Circuit Design Engineer - SerDes

Role Summary

Lead the design, implementation, and validation of analog and mixed-signal circuits for high-speed SerDes (112G/224G) within a cross-disciplinary engineering organization. Act as a technical driver for circuit architecture, execution, and post-silicon validation while collaborating with systems, digital, layout, and test teams.

The role includes hands-on design and lab debug, mentoring junior engineers, and contributing to documentation and design reviews to ensure robust product delivery in advanced FinFET CMOS processes.

Experience Level

Senior (Principal). The posting specifies a minimum of 8+ years of relevant analog/mixed-signal SerDes design experience, with leadership and mentorship responsibilities; 10+ years is preferred.

Responsibilities

Core responsibilities include technical leadership across analog/mixed-signal design, validation, and cross-functional integration:

• Define, execute, and validate analog circuit designs for high-speed SerDes (112G/224G).
• Provide technical direction and mentorship to layout engineers and less-experienced analog designers.
• Lead silicon bring-up, post-silicon validation, and lab debug for analog circuits.
• Collaborate with systems, digital, test, and layout teams to ensure end-to-end design robustness.
• Participate in architecture and design reviews; document and present design results and trade-offs.
• Troubleshoot complex analog issues (noise, jitter, stability, matching, linearity) under schedule constraints.

Requirements

Must-have technical skills, tools, and experience. Education requirements are listed separately below.

• 8+ years of analog/mixed-signal circuit design experience for high-speed SerDes applications.
• Proven expertise in one or more of: PLL, CDR, CTLE, DFE, ADC, or transmitter (TX) design.
• Familiarity with high-speed communication standards such as PCIe (Gen5/Gen6) and Ethernet (100G/400G/800G).
• Strong foundation in analog design principles: noise, jitter, matching, stability, and linearity.
• Hands-on experience with advanced FinFET CMOS process technologies (7 nm or below).
• Proficiency with analog design and simulation tools such as Cadence Virtuoso/ADE and HSPICE (or equivalents).
• Experience in silicon bring-up, post-silicon validation, and laboratory debug of analog circuits.
• Strong communication, documentation, presentation, and problem-solving skills; ability to deliver under tight schedules.

Nice-to-have:

• Deep expertise in transmitter and receiver architecture, CDR loops, equalization techniques, and advanced ADC architectures.
• Familiarity with next-generation standards (PCIe 6.0+, 800G/1.6T Ethernet, JESD) and system link performance analysis.
• Experience with behavioral modeling (Verilog-A), MATLAB analysis, and automation scripting (Python, Tcl, Perl).
• Proven ability to mentor junior engineers and lead cross-functional technical discussions.

Education Requirements

Minimum: Master's degree in Electrical Engineering, Electronics Engineering, or a related field. Preferred: Ph.D. in Electrical Engineering, Electronics Engineering, or related field. The posting references technical fields related to electrical/electronics engineering; equivalent practical experience is not explicitly stated.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.