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Principal Analog Circuit Design Engineer - SerDes

Intel Corporation
May 03, 2026
Full-time
Remote friendly (Santa Clara, California, United States)
United States
$220,920 - $311,890 USD yearly
ASIC Design Jobs, Level - Senior

Job Title

Principal Analog Circuit Design Engineer - SerDes

Role Summary

Lead the design and validation of analog and mixed-signal circuits for high-speed SerDes (112G/224G) products. Serve as the principal technical driver for architecture definition, circuit implementation, and post-silicon verification.

Work with cross-functional teams (systems, digital, layout, test) and mentor junior analog designers to ensure robust designs and timely delivery.

Experience Level

Senior / Principal-level engineer. Typical guidance: 8+ years of relevant analog/mixed-signal design experience; more senior candidates often have 10+ years.

Responsibilities

Primary responsibilities include technical leadership of analog SerDes circuit design and validation.

  • Define, execute, and validate complex analog/mixed-signal SerDes designs (transmitters, receivers, PLLs, CDRs, ADCs, equalizers).
  • Provide technical direction and mentorship to layout engineers and less-experienced analog designers.
  • Collaborate with systems, digital, and test engineering teams to ensure design-for-testability and system-level performance.
  • Lead silicon bring-up, post-silicon validation, and lab debug activities to close design-to-silicon cycle.
  • Prepare and present technical documentation and design reviews to stakeholders.
  • Drive decisions in cross-functional technical discussions and participate in architecture trade-offs.

Requirements

Must-have technical skills and experience; preferred items listed separately.

  • Proven expertise in one or more: PLL, CDR, CTLE, DFE, ADC, or transmitter design.
  • Solid understanding of analog design principles: noise, jitter, matching, stability, and linearity.
  • Hands-on experience with advanced FinFET CMOS process technologies (7 nm or below).
  • Proficiency with analog design and simulation tools such as Cadence Virtuoso/ADE and HSPICE (or equivalents).
  • Experience with silicon bring-up, post-silicon validation, and lab debug of analog circuits.
  • Familiarity with high-speed communication standards (PCIe Gen5/Gen6, Ethernet 100G/400G/800G) and channel/link performance considerations.
  • Nice-to-have: behavioral modeling (Verilog-A), MATLAB analysis, automation scripting (Python/Tcl/Perl), deep expertise in transmitter/receiver architectures, and experience with next-generation standards (PCIe 6.0+, 800G/1.6T Ethernet, JESD).

Education Requirements

Master's degree in Electrical Engineering, Electronics Engineering, or a related field is required. Ph.D. in Electrical/Electronics Engineering or related field is preferred. (Equivalent practical experience was not specified.)


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-04-30