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Pre-Silicon Design Verification Engineer, Sr. Staff

Synopsys
Full-time
On-site
Zapopan, Mexico
Level - Senior

Role Summary

You are a seasoned and passionate Pre-Silicon Design Verification Engineer who thrives in a dynamic, collaborative environment. With a proven track record in pre-silicon verification, you leverage your deep understanding of SoC architectures and advanced verification methodologies to drive projects from concept to completion. Your expertise in SystemVerilog, UVM, and scripting languages enables you to architect robust test benches and develop comprehensive verification strategies for complex IP subsystems.

Experience Level

Level - Senior

Responsibilities

  • Interpreting SoC and IP subsystem specifications to define comprehensive verification scopes and strategies.
  • Planning, architecting, and developing UVM-based testbenches and verification environments to ensure design correctness and robustness.
  • Writing and executing detailed test plans and test cases, utilizing SystemVerilog, HDL, and scripting languages such as Python and Perl.
  • Collaborating with design, validation, and emulation teams to identify, debug, and resolve complex design issues across multiple levels of abstraction.
  • Leveraging advanced verification tools, including Synopsys VCS and Verdi, to analyze waveforms, automate processes, and improve verification efficiency.
  • Guiding and mentoring junior engineers, sharing best practices, and driving verification excellence across the team.
  • Engaging with cross-functional teams and senior personnel to communicate progress, share insights, and recommend innovative solutions.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 8+ years of experience verifying SoC devices, with at least 6 years dedicated to pre-silicon verification.
  • Strong hands-on experience with UVM methodology, SystemVerilog, and scripting languages (Perl, Python).
  • Proficient understanding of the complete SoC development and verification flow.
  • Familiarity with standard protocols such as PCIe, DDR4, GDDR, HBM, and AMBA is highly desirable.
  • Experience with emulation, HAPs, or FPGA prototyping systems from RTL is a plus.
  • Knowledge of formal and power-aware verification techniques is a bonus.

Education Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.