Physical Design Engineer / Senior Engineer

Job Title

Physical Design Engineer / Senior Engineer

Role Summary

Join Qualcomm's SoC and ASIC physical design organization to implement complex digital designs from synthesized netlist to tape-out. Work across projects (GPU, Camera, DDR, Modem, AI, data center, automotive) focusing on high-performance and low-power implementation on advanced process nodes.

Experience Level

Senior level. The posting expects industry or equivalent project experience (see Education Requirements). Typical guidance in this posting is 2+ years of physical-design experience (or 1+ year with a relevant Master’s, or PhD).

Responsibilities

Execute and drive physical implementation and sign-off activities for ASICs and SoCs.

• Perform floorplanning, partitioning, power planning, and IR-drop analysis.
• Execute placement, clock tree synthesis (CTS), routing, and timing optimization across Multi-Mode Multi-Corner (MMMC) scenarios.
• Analyze and resolve timing violations, signal integrity/crosstalk, and physical DRC/LVS issues.
• Perform RC extraction, physical verification, and support formal verification activities.
• Implement engineering change orders (ECOs) and drive design convergence through sign-off.
• Collaborate with architecture, RTL, DFT, verification, and methodology teams to meet project goals.
• Develop automation and productivity tools to improve flow efficiency and enable new methodologies.

Requirements

Must-have technical skills and practical experience; preferred items listed separately.

• Practical experience in ASIC/SoC physical design implementation and timing closure.
• Experience with placement, CTS, routing, timing optimization, and sign-off flows.
• Experience developing automation or tools using scripting or software languages (Python, TCL, Perl, Shell, C/C++).
• Comfortable working in Linux/Unix environments and collaborating with cross-functional teams.
• Nice-to-have: familiarity with Cadence Innovus, Synopsys Fusion Compiler, Synopsys PrimeTime SI, low-power methodologies, DFT-aware implementation, MMMC sign-off flows, and signal-integrity/noise analysis.

Education Requirements

Degree and equivalent experience: Bachelor's degree in Science, Engineering, or a related field with 2+ years of ASIC/design experience; OR Master's degree in Science/Engineering or related field with 1+ year of ASIC/design experience; OR PhD in a relevant field. Fields explicitly mentioned include Electrical Engineering, Computer Engineering, Computer Science, or related technical fields. Relevant academic or project experience in physical design is also considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.