Physical Design Engineer
Intel CorporationJob Title
Physical Design Engineer
Role Summary
Join Intel's Central Engineering Group as a Physical Design Engineer focused on partition-level RTL-to-GDS implementation for custom IP and SoC designs. The role delivers manufacturing-ready design databases by executing synthesis, floorplanning, place-and-route, clock-tree synthesis, signoff checks, and collaboration with cross-functional teams.
Position is eligible for Intel's hybrid work model; primary site: Bangalore, India.
Experience Level
Mid-level. No explicit years-of-experience specified; candidates should have practical experience executing partition-level RTL2GDS flows and signoff activities.
Responsibilities
Primary responsibilities focus on physical implementation and signoff at the partition level to meet power, performance, area, and manufacturability goals.
- Execute full partition-level RTL-to-GDS flow: synthesis, floorplanning, placement and routing, clock-tree synthesis, and final design finishing.
- Perform signoff activities: formal equivalence verification, static timing analysis (STA), layout verification (LVS/DRC), and electrical rule checks.
- Analyze physical-design results, identify violations, implement fixes, and recommend architectural or implementation improvements.
- Optimize designs for power, frequency, and area using industry-standard EDA tools.
- Collaborate with architects, RTL designers, verification, and other cross-functional teams to ensure design integrity and product-level outcomes.
Requirements
Listing of required technical skills and desirable attributes. Education requirements are summarized separately below.
Must-have:
- Practical experience with partition-level RTL-to-GDS physical implementation and signoff flows.
- Proficiency with industry-standard EDA tools for synthesis, place-and-route, timing analysis, and layout verification.
- Experience with floorplanning, clock-tree synthesis, timing closure, and addressing STA violations.
- Ability to perform layout verification tasks (LVS/DRC) and interpret electrical rule checks.
- Strong analysis and problem-solving skills and ability to communicate and collaborate across teams.
Nice-to-have:
- Experience with partition-level signoff ownership and optimization for power, area, and frequency.
- Familiarity with formal equivalence verification flows.
Education Requirements
Bachelor's degree in Electrical Engineering, VLSI, Computer Engineering, or a related field is stated as the expected qualification.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
