Physical Design Engineer

Job Title

Physical Design Engineer

Role Summary

The Physical Design Engineer is an individual contributor on the HIPD SAM team responsible for block-level physical implementation of Hard-IP and testchip designs from netlist to GDSII. The role focuses on executing established physical design methodologies, delivering quality metrics for timing, power, and area, and collaborating with logic, STA, analog layout, and methodology teams.

Experience Level

Mid-level. Typical experience guidance: 3+ years with a Bachelor's degree, 2+ years with a Master's degree, or 0 years with a PhD.

Responsibilities

Primary execution and delivery responsibilities for block-level physical design.

• Own netlist-to-GDSII physical implementation under established methodologies.
• Perform floorplanning, power intent setup, placement, CTS, routing, optimization, and ECO closure.
• Run, debug, and maintain physical design flows in standard EDA tool environments.
• Support physical sign-off activities, including DRC/LVS and IR/EM analysis.
• Analyze and improve QoR metrics: timing, power, and area for assigned blocks.
• Develop and maintain scripts and automation to improve productivity and execution quality.
• Collaborate with Logic, STA, Analog Layout, and Methodology teams to resolve design issues.
• Follow team-defined execution standards, checklists, and quality gates.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven experience with netlist-to-GDSII implementation, including floorplanning, placement, CTS, routing, and power integrity analysis.
• Hands-on experience with physical design methodologies and EDA tools for implementation and static timing analysis.
• Proficiency in scripting for automation and flow optimization (Tcl, Perl, or Python).
• Experience debugging physical design flows and resolving timing convergence and QoR issues in lower technology nodes.
• Ability to work within defined sign-off practices and quality gates.

Nice-to-have:

• Experience designing high-speed, low-power digital circuits and advanced timing closure techniques.
• Familiarity with Verilog or SystemVerilog.
• Knowledge of sub-micron CMOS technologies and VLSI circuit design techniques.
• Strong communication and collaboration skills for global teamwork.

Education Requirements

Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field is specified. The posting also references reduced experience requirements for advanced degrees: 3+ years experience with a Bachelor's, 2+ years with a Master's, or 0 years with a PhD. Equivalent practical experience is not explicitly detailed but the role references related-field degrees.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.