NOC Design Verification Engineer

Job Title

NOC Design Verification Engineer

Role Summary

Lead and execute design verification for complex NoC, interconnect, AI, datacenter and HPC IPs/sub-systems. Work with cross-functional teams to deliver signoff-quality verification covering architecture, protocol, performance and system-level scenarios.

Experience Level

Mid-level - position expects demonstrated independent ownership and deep verification expertise. No explicit years-of-experience requirement listed.

Responsibilities

Primary responsibilities include planning and executing verification campaigns and delivering closure to signoff standards.

• Lead verification from specification review through signoff-quality closure for IPs/sub-systems.
• Design and build reusable SystemVerilog/UVM verification environments, UVCs/agents, sequences, scoreboards, checkers and coverage infrastructure.
• Develop verification plans, constrained-random tests, assertions (SVA), functional coverage models, and regression suites.
• Debug RTL, protocol, architecture, performance and testbench issues; perform root-cause analysis and triage.
• Drive performance, QoS, congestion and scalability validation and system-level qualification.
• Collaborate with architects, RTL designers, and software teams; provide technical leadership and execution in fast-paced programs.

Requirements

Must-have technical skills and experience. Preferred items listed after must-haves.

• Expert in SystemVerilog and UVM; experience building reusable verification IP and infrastructure.
• Strong skills in constrained-random verification, SVA, functional coverage closure, regression management, and signoff methodologies.
• Protocol verification expertise in one or more: PCIe (Gen4/5/6), USB (3.x/4), Ethernet (10G/25G/100G/400G+), CXL, or other high-speed serial/networking protocols.
• Experience verifying NoC, coherent/non-coherent interconnects, memory/cache subsystems, AI accelerators, or complex data movement fabrics.
• Proficiency in scripting for automation (Python, Shell, Perl, or Tcl) and familiarity with industry simulators, debug and coverage tools, emulation and CI/CD workflows.
• Strong debugging, performance analysis, and system-level verification skills.
• Nice-to-have: SystemC/TLM modeling, performance modeling, emulation/prototyping, post-silicon correlation, and experience delivering first-pass verification closure for complex SoC or multi-die platforms.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering or related field is listed as a minimum. The posting also specifies B.Tech/M.Tech in Electronics, Electrical Engineering, Computer Science, VLSI or related disciplines from reputed institutions (IITs, NITs, IIITs, BITS or equivalent). Relevant industry experience aligned with the position level is also expected.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.