Next Gen, High-Speed, Memory and Cache Controller Design Engineer
QualcommJob Title
Next Gen, High-Speed, Memory and Cache Controller Design Engineer
Role Summary
Design and deliver high-speed memory and cache controller IP used in SoCs, focusing on front-end interfaces to CPU, GPU, DSP and multimedia processors. Work spans architecture, RTL implementation, verification interaction, integration/debug, and support for synthesis, timing closure and physical design.
This role contributes to next-generation HBM/LPDDR/DDR memory subsystems for high-performance, low-power products.
Experience Level
Senior (posting references a Senior ASIC Design Engineer). The team also welcomes applications from recent graduates and early-career candidates; it notes interest in candidates with ~3+ years of relevant experience.
Responsibilities
Primary responsibilities include implementing and delivering RTL-based memory controller logic and supporting its integration into SoCs.
- Define micro-architecture and translate architecture/specifications into RTL.
- Implement, deliver, and debug RTL; collaborate closely with verification engineers.
- Support synthesis, timing closure, physical design, gate-level simulation and power analysis.
- Provide integration and silicon debug support when logic is fused into the chip.
- Drive improvements in design methodology to increase productivity and quality.
- Collaborate cross-functionally with CPU/GPU/DSP/multimedia teams to ensure correct interfacing and transaction ordering.
Requirements
Must-have technical skills and experience for this role.
- Proven RTL design and micro-architecture experience for complex digital blocks and IP.
- Experience with LPDDR memory and cache controller front-end design interfacing to CPU/DSP/multimedia processors.
- Familiarity with on-chip tightly coupled SRAM and L3 cache controller architecture/design.
- Experience with x86 or ARM CPU/bus architectures and enforcing ISA-consistent memory transaction ordering.
- Practical experience with synthesis, timing closure, physical design support, gate-level simulation, and power analysis.
- Strong debugging skills for RTL and system integration issues; ability to support bring-up and silicon debug.
- Nice-to-have: exposure to HBM-type memory designs and NoC-based architectures.
Education Requirements
Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Science, Engineering, or a related technical field. The posting explicitly lists a Master's in Computer Engineering and/or Electrical Engineering; earlier lines also reference a Bachelor's in a science or engineering discipline.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
