Job Title
NAND Custom Test Circuit Design Engineer
Role Summary
Design and validate custom test circuits for NAND flash memory at the transistor level, supporting product definition, silicon bring-up, and ramp to production. Work cross-functionally with layout, product engineering, and test teams to ensure testability, manufacturability, and reliability.
Experience Level
Mid-level β expects at least 2+ years of relevant experience in custom/analog or mixed-signal circuit design and silicon debug.
Responsibilities
Key responsibilities include design, validation, and production support of custom test circuitry for NAND memory.
- Develop and optimize transistor-level digital, analog, mixed-signal, monitoring, control, and memory-array interface test circuits.
- Define circuit functionality, interfaces, operating limits, controllability, observability, and validation criteria from product specifications.
- Create, review, and optimize schematics, device sizing, bias structures, sensing/monitoring paths, and multiplexers for test circuits.
- Analyze testability and robustness to meet coverage, manufacturability, power, area, and reliability goals.
- Validate circuits using XA (or equivalent) transistor-level simulations, Verilog, and mixed-signal validation environments; review post-layout results and drive closure.
- Collaborate with layout teams on matching, parasitics sensitivity, shielding, routing, guard rings, and layout-dependent effects.
- Support first-silicon bring-up, debug, characterization, failure isolation, and simulation-to-silicon correlation.
- Create and debug test sequences and test modes for wafer- and package-level validation.
- Use laboratory measurements and silicon data to identify root causes and recommend circuit or test improvements.
- Document test-circuit methodologies, specifications, validation results, silicon correlation, and technical recommendations.
Requirements
Must-have technical skills and experience.
- Minimum 2+ years of hands-on experience in custom/analog circuit design, mixed-signal design, memory peripheral circuit design, or product engineering with transistor-level circuit and silicon-debug exposure.
- Strong understanding of CMOS device operation, leakage mechanisms, parasitics, PVT sensitivity, timing, loading, noise margin, power, and reliability principles.
- Hands-on proficiency with circuit build entry, waveform debug, and post-layout verification.
- Proficiency with XA or equivalent fast transistor-level simulation tools, Verilog, and mixed-signal validation methodologies.
- Proficiency in Python or scripting for simulation automation, regression analysis, result extraction, and waveform processing.
- Ability to evaluate circuit risks (leakage, contention, floating nodes, device overstress, power sequencing, current density, EM/IR, long-duration stress) and recommend mitigations.
- Experience applying AI-assisted engineering workflows and developing automation or AI-enabled solutions to improve design quality and productivity.
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Nice-to-have: Solid understanding of NAND flash architecture and test modes; laboratory skills with oscilloscopes, logic/signal analyzers, source-measure equipment, and hands-on wafer/package testing.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related technical field. The posting specifies a minimum of 2+ years of relevant experience.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.

Date Posted: 2026-08-21