Mixed-Signal Digital Design Engineer - Cork, Ireland

Job Title

Mixed-Signal Digital Design Engineer

Role Summary

Design and implement digital logic for mixed-signal IP blocks (SerDes, DDR PHY, PLLs, DAC/ADC, sensors) within Qualcomm's Mixed-Signal IP (MSIP) team. Work on micro-architecture, RTL implementation, and collaborate with verification and physical design teams to deliver silicon-ready IPs targeted at mobile, compute, automotive, and AI applications.

Position is based in Cork, Ireland (onsite). The role focuses on improving power, performance, and area (PPA) of IPs and supporting silicon bring-up and debug.

Experience Level

Mid-level (typically 3–7 years experience). The posting indicates candidates with ~5+ years ASIC digital design experience are preferred, though equivalent practical experience will be considered.

Responsibilities

Primary responsibilities include architecture, RTL design, tool-driven implementation, verification support, and silicon debug.

• Architect, design, and implement digital sections of mixed-signal IPs (e.g., SerDes, DDR, PLL, DAC, ADC, sensors).
• Apply computer architecture and DSP techniques to optimize power, performance, and area (PPA).
• Run front-end and implementation tool flows (lint, CDC, DFT, synthesis, formal/FPV, STA) to validate designs.
• Collaborate with design verification teams to define test plans, verify RTL, and resolve issues.
• Partner with physical design teams for timing, synthesis, and layout handoff.
• Produce design specifications and documentation; support silicon bring-up and lab debug.

Requirements

Must-have skills and experience for this role. Education details are listed under Education Requirements below.

• Must-have: Several years of ASIC digital design experience with micro-architecture definition and RTL design; demonstrated RTL coding and front-end implementation skills.
• Must-have: Hands-on experience with front-end ASIC tools such as Design Compiler, Fusion Compiler, ModelSim, VCS, SpyGlass, and PrimeTime or equivalent.
• Must-have: Experience working across DV and PD teams; familiarity with lint, CDC, DFT, synthesis, formal verification, and STA flows.
• Must-have: Strong communication skills and ability to work in a high-performance team environment.
• Nice-to-have: Low-power digital design experience, computer architecture and DSP background, scripting (Python, Perl).
• Nice-to-have: Prior exposure to mixed-signal IPs (SerDes such as PCIe/USB/MIPI/UFS, DDR PHY, timing circuits, DAC/ADC, sensor interfaces).

Education Requirements

Degrees in engineering or related technical fields are expected. The posting references Bachelor's, Master's, and PhD-level qualifications in Electrical Engineering, Computer Engineering, Science, Engineering, or related fields. Multiple qualification options were listed (e.g., Bachelor's + relevant experience; Master's with fewer years; or PhD). Equivalent practical experience will be considered in lieu of a listed degree.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.