Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect

Job Title

Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect

Role Summary

The role designs and microarchitects tightly coupled, high‑performance memory systems optimized for AI workloads. Work involves translating architecture requirements into efficient RTL implementations with responsibility for performance, power, area and reliability from concept through silicon implementation.

Experience Level

Mid-level. Candidates with 5+ years of industry experience delivering silicon‑demonstrated memory systems and SoC hardware designs are preferred.

Responsibilities

Primary responsibilities include microarchitecture, RTL development, and early PPA analysis to guide architecture tradeoffs.

• Translate architecture requirements into scalable microarchitectures and own features from specification through implementation.
• Design, implement, and review SystemVerilog RTL for memory subsystems.
• Perform synthesis and early performance, power, and area (PPA) analysis to estimate and optimize area, power, and timing.
• Compose and maintain clear microarchitecture documentation to align cross‑functional teams.
• Drive technical decisions by evaluating tradeoffs between microarchitecture and implementation constraints.

Requirements

Core technical skills and experience required; preferred qualifications listed separately.

• Strong digital design and microarchitecture development experience with ownership of hardware blocks through implementation.
• Solid understanding of computer and memory system architecture and SoC‑level tradeoffs.
• Experience with synthesis and early PPA estimation and optimization.
• Proficiency with hardware description languages such as SystemVerilog.
• Experience with at least one high‑level language (C/C++ or Python) for modeling or automation.
• Ability to influence technical decisions using data‑driven analysis.

Nice-to-have:

• Familiarity with memory interfaces and media management / reliability concepts.
• Experience connecting architecture and implementation and influencing features based on RTL cost and feasibility.
• Proven delivery of silicon‑demonstrated memory systems on modern foundry nodes.

Education Requirements

Master's or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent practical experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.